ECC RAM Support

Hello Guys,

I was reading the hardware guide and saw mentioning of ECC RAM. I know that consumer boards are not that much suggested but my question is since Alder Lake, it uses DDR5. I know that there are DDR4 too but DDR5 by default uses the ECC. So, is it really true? Are these CPU and desktop memory really support the true ECC?

Thanks

As far as i know there’s a difference between ECC and On Die ECC, what ddr5 uses. But i haven’t read too much into it yet…

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Short answer: DDR5 “onband ECC” is NOT “true ECC” in the sense we want for servers.

Medium answer:
Some Alder Lake and newer CPUs (from the middle of “i5” onwards) can use “true ECC”, but this requires a W chipset (W680, W880), not the consumer B, H or Z chipsets.

Long answer:

“True ECC” = sideline
On-die ECC = “fake ECC”
Inline ECC qualifies as “true ECC”, but comes at the expense of bandwidth and capacity, and is typically only available on some embedded server boards with soldered-on LPDDR5 RAM.

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Makes sense. But those Alder Lake or newer support real ECC memory?

“Real” ECC UDIMM, when used with a C200 or Wx80 chipset.
up to 9th gen: Core i3 (C2xx)
10th-11th gen: none (only Xeon E or Xeon W-1000)
12th gen and later: i9, i7 and some but not all i5 (check in ARK) (Wx80 chipset)

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This is not quite true.

One of the challenges to make smaller traced memory, (aka faster), and denser, (aka higher GigaByte capacity), is that the chip yields can go down. Instead of throwing away failing memory, or using it / them as much smaller memory, (like 1/2 capacity), manufacturers wanted to build in spare cells to memory. Just like we have been doing for storage over the last several decades.

These spare memory cells are initially allocated as needed by the manufacturers during testing. But, it is both possible to add new replacements semi-permanently, or even as ephemeral replacements, (ones that are temporary until next power cycle).

DDR5 even has memory scrubbing, which I am unclear if it does anything useful without out of band ECC.

As for what “On-Die ECC” is, I am not clear. What it does not appear to be, is extra cells that allow detecting and correcting errors before transferring to the CPU. However, Wikipedia and other sources are quite vague, (in my opinion), on what On-Die ECC is:

So, given the choice, I would rather have out of band real ECC, (DDR4 or DDR5), than DDR5’s On-Die ECC.

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